TMCnet

Microsemi Announces Libero SoC v11.8 Software Providing FPGA Designers Mixed Language Simulation and Best-in-Class Debugging Capabilities

ALISO VIEJO, Calif., April 11, 2017 /PRNewswire/ -- Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, ...
New Electronics

First integrated FPGA-in-the-loop workflow for PolarFire and SmartFusion2 FPGA development boards

Microsemi has announced a collaboration with MathWorks to launch hardware support for field programmable gate array (FPGA)-in-the-loop (FIL) verification workflow with Microsemi FPGA development ...
Design-Reuse

Microsemi Collaborates with MathWorks to Deliver First Integrated FPGA-in-the-Loop Workflow for PolarFire and SmartFusion2 FPGA Development Boards

ALISO VIEJO, Calif. -- April 19, 2018-- Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today ...
Electronics Weekly

Microsemi and MathWorks support FPGA-in-the-loop verification

Microsemi and MathWorks launched hardware support for FPGA-in-the-loop (FIL) verification workflow with Microsemi FPGA development boards. The integrated FIL workflow with HDL Coder and HDL Verifier ...
EDN

Microsemi’s New Libero SoC v11.4 Software Makes Significant FPGA Design Productivity Gains with Runtime Improvements of Up to 35 Percent

Microsemi's new Libero SoC v11.4 release improves design flow runtime by up to 35 percent for its award-winning SmartFusion2 ™ SoC FPGAs and IGLOO2 ™ FPGAs. The new release also offers greater design ...
Yahoo Finance

Microsemi Ships SoC FPGA

Additionally, the company announced the availability of the SmartFusion2 development kit, which features SmartFusion2 M2S050T-FGG896 SoC FPGA with 56K logic element, 256Kbit eNVM, 1.5Mbit SRAM and ...
EE Herald

Microsemi's RTG4 FPGA development kit for satellite electronics

Are you exploring to use Microsemi's RTG4 FPGA for digital signal processing in your satellite communication applications? Microsemi is now offering a development kit based on this FPGA, so that you ...
EDN

Microsemi uses “private labeling” to turn FPGA, cSOCs into ASSPs

A friend who covered the electronic-design software industry once told me the story of a marketing director who approached him with the pitch, “We don’t have anything new to show you, we’ve just ...
New Electronics

HES-DVM simulation acceleration flow for Microchip FPGA designs

Aldec, an expert in mixed-HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has introduced a HES-DVM simulation acceleration flow for Microchip’s PolarFire, ...