Imec has developed a Cu-to-Cu and SiCN-to-SiCN die-to-wafer bonding process resulting in a Cu bond pad pitch of only 2µm at <350nm die-to-wafer overlay error, achieving good electrical yield. Such ...

Momentum is building for copper hybrid bonding, a technology that could pave the way toward next-generation 2.5D and 3D packages. Foundries, equipment vendors, R&D organizations and others are ...

—The development of a process flow capable of demonstrating functionality of a monolithic complementary FET (CFET) transistor architecture is complex due to the need to vertically separate nMOS and ...

A technical paper titled “Review of virtual wafer process modeling and metrology for advanced technology development” was published by researchers at Coventor Inc., Lam Research. “Semiconductor logic ...