note

QuartusⅡ v13.1の使い方1～プロジェクトを作る編

ここでは、ALTERA社のQuartusⅡ v13.1の使い方についてご紹介します。同ツールを使えばVHDLやVerilogで記述した回路を論理合成したり、シミュレーションを行ったりすることで最終的にFPGA化することができます。今回紹介するバージョンは2024年8月時点において ...
Hackaday

FPGA Used VHDL For Fractals

Over on GitHub, [ttsiodras] wanted to learn VHDL. So he started with an algorithm to do Mandelbrot sets and moved it to an FPGA. Because of the speed, he was able to accomplish real-time zooming. You ...
Hackaday

Did You Know YoSys Knows VHDL Too?

We’ve been fans of the Yosys / Nextpnr open-source FPGA toolchain for a long while now, and like [Michael] we had no idea that their oss-cad-suite installer sets up everything so that you can write in ...
GitHub

KhaNguyen-Q/UART_Serial_Communication_Project

FPGA-based UART and traffic light controller implemented using structural RTL design in VHDL. The project emphasizes FSM-driven control logic, synchronous digital design, and verification through ...
Design-Reuse

Start-up OptNgn Offers a Floating Point VHDL Library as Open Source

Portland, Oregon -- April 16, 2008-- OptNgn today announced that it is offering a floating point VHDL library under the GPLv3 Open Source License. FPGA designers can now save months of coding and ...
ドリームニュース

サーヴァンツ、Netcope（ネットコープ） FPGAネットワークアダプター ...

ネットワーク製品のスペシャリストであるサーヴァンツインターナショナル株式会社 （本社：東京都新宿区、代表取締役社長：古田雅一、以下サーヴァンツ）は、国内正規代理店を務めるNETCOPE社（本社：チェコ共和国ブルノ）の新サービスである「P4 to VHDK ...
Design-Reuse

Hitachi Endorses Model Technology ModelSim for Verilog Simulation

PORTLAND, Ore.--(BUSINESS WIRE)--Oct. 3, 2001--Model Technology(TM), a Mentor Graphics company, today announced that the ModelSim® hardware description language (HDL) simulator has received Verilog ...
Ars Technica

Open Source VHDL (or similar) CPU Simulation Software

Hey all, my last semester of college we had to develop the microarchitecture for a RISC processor. My group was ultimately unsuccessful (our L2 cache had some serious issues), but I wouldn't mind ...