This is our implementation, plotting code and report for the prefetcher lab of the course computer architecture (TDT4260) at NTNU. The goal is to research on, understand and implement a self-chosen ...

Abstract: Temporal prefetching, where correlated pairs of addresses are logged and replayed on repeat accesses, has recently become viable in commercial designs. Arm’s latest processors include ...

Abstract: Indirect memory access is a critical bottleneck for modern CPUs, especially for graph analysis and sparse linear algebra applications, where the values of one data array are used to generate ...

Pythia is a hardware-realizable, light-weight data prefetcher that uses reinforcement learning to generate accurate, timely, and system-aware prefetch requests. Pythia formulates hardware prefetching ...