set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)" set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation set_global_assignment -name ...
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT NONE -section_id eda_simulation set_global_assignment -name SDC_FILE ../hdl_src/soc_system_timing.sdc set_global ...
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