EDN

SIGNAL CHAIN BASICS #56: Clock Jitter Demystified–Random Jitter and Phase Noise

Figure 1 depicts the nature of the information provided by measuring a signal in the time domain vs. the frequency domain. Both provide insight into the content of the signal and possible approaches ...
EDN

SIGNAL CHAIN BASICS #61: Clock jitter demystified-random jitter and phase noise, Part 2

Editor's note: Signal Chain Basics is an ongoing and popular series; click here for a complete, linked list of all installments.) In Signal Chain Basics Part 56 we discussed the fundamental ...
Electronic Design

Phase-Noise Modeling, Simulation, and Propagation in Phase-Locked Loops (Part 1)

Some brief theory and typical measurements of phase noise. Standard analysis of PLL phase noise used by most CAD applications. How to produce the lowest phase noise at a PLL output. A standard design ...