This is a port of Linux to the OpenRISC class of microprocessors; the initial target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k). For information about OpenRISC processors ...

We have a list of projects, some of which are currently in progress, and some of which we want others to start work on. OpenRISC is a very broad project and there is likely something to do for any ...

remove-circle Internet Archive's in-browser bookreader "theater" requires JavaScript to be enabled. It appears your browser does not have it turned on. Please see ...

Abstract: This paper presents the design and implementation of an OpenRISC-based System-on-Chip (SoC), which is composed of hardware cores implementing the Digital Signal Processing (DSP) functions: ...

Abstract: Today's embedded systems require resource-aware acceleration engines, which support advanced cryptographic algorithms such as elliptic-curve cryptography (ECC). The authors present an ...

The OpenRISC 1200 may be slow, but the technology involved in it is accessible to all, writes Danny O'Brien The OpenRISC 1200 may be slow, but the technology involved in it is accessible to all, ...

前回はRISC-V ISAの成立までを簡単に説明したが、Asanović教授はRISC-V ISAを自身の研究プロジェクト用に留めておくつもりはなかった。ISA（Instruction Set Architecture、命令セット）の重要性の高さは言うまでもなく明らかで、これがx86やArm ISAが現在も主流になって ...

July 17, 2008-- OpenCores is pleased to announce the release of a solution aimed at lowering the technical threshold of development with the open-source OpenRISC processor. There will always be ...