Upcoming 14A and 10A process nodes will use high-NA EUV anamorphic scanners, which will require two stitched half-fields to achieve the equivalent wafer exposure area of previous-generation scanners, ...

Concept of mask/wafer co-optimization by moving the shot with mask and wafer double simulation to minimize wafer error. VSB shot configurations and its corresponding ...

Lithography, once the exclusive domain of artists and printmakers, also lies at the heart of integrated circuit (IC) production. The process of shining light on a substrate through a photomask to ...

Nikon Corporation, which supplies lithography equipment for microelectronics manufacturing, said its optical lithography exposure tool data is available for the latest release of EDA giant Synopsys' ...

The movement of true design for manufacturing into the hands of designers is beginning, and Aprio's Halo-Fix tool is a harbinger of more to come. Halo-Fix lets engineers use the results from any ...

One of the main challenges in developing semiconductor chip technology is making electronic components smaller and more effective. This difficulty is most noticeable in lithography, which is the ...