AUSTIN, Texas — LSI Logic Corp. said it is production-ready with flip-chip packages on an 0.11-micron process that includes low-k dielectrics. The soft, porous nature of low-k materials presents a ...
LSI Logic Corp. has announced that it will begin volume production of flip-chip packages using the company's new Gflx 0.11-micron copper and low-k di-electric silicon process, enabling engin-eers to ...
A research team has developed a continuous roll-processing technology that transfers and packages flexible large-scale integrated circuits (LSI), the key element in constructing the computer's brain ...
Research teams from the Korea Advanced Institute of Science and Technology (KAIST) and the Korea Institute of Machinery and Materials (KIMM) have developed a continuous roll-processing technology that ...
This schematic image shows the flexible silicon NAND flash memory produced by the simultaneous roll-transfer and interconnection process. (Image: KAIST) Professor Lee previously demonstrated the ...
Increases bandwidth by 400 percent over commonly used SerDes interfaces Easy integration into high speed SerDes cores in LSI Logic cell-based ASIC or RapidChip Platform ASIC designs MILPITAS, Calif., ...
Abstract: A novel optoelectronic LSI package using a post-reflow optical-interface stacking technique (POST), which enables high speed operation at more than 10 Gbps/ch on the standard FR-4 PWB was ...
TOKYO – Toshiba Corporation and NEC Electronics Corporation today announced that they have agreed to collaborate on the development of CMOS logic process technology for the 45-nanometer (nm) ...
Abstract: 3D-LSI packaging technology with trough silicon via (TSV) is useful for high density and shortened wiring to achieve low power consumption and wide bandwidth for high performance processor. ...
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