Philippe Luc, director of verification at Codasip, talked to students of the UK Electronics Skills Foundation (UKESF) about what it is like to be a verification engineer. On one hand the UKESF ...

Designing the hardware-software interface. Dealing with "bytes enables" in RTL verification. Automating the HSI design process across the entire dev team. The hardware-software interface (HSI) holds ...

How formal verification is able to find bugs before signoff. Formal verification’s ability to mathematically prove exhaustively that a chip design meets a set of assertions. Formal techniques are ...

To some degree, FPGA prototyping has become commonplace in the majority of SoC development programs. This paper is a brief discussion of four aspects of this type of approach. First the forces behind ...

Intel's confirms 'Unified Cores' project in a job listing, but actual CPUs with these unified cores could be years away.