IEEE

An Area-Efficient Column-Parallel Digital Decimation Filter With Pre-BWI Topology for CMOS ...

Abstract: This paper presents an area-efficient design of a column-parallel second-order digital decimation filter for a ΣΔ analog-to-digital converter-based CMOS image sensor. By using the proposed ...
GitHub

tb_decimation_filter.vhd

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IEEE

Pixel-Decimation-Assisted Steganalysis of Synchronize-Embedding-Changes Steganography

Abstract: This paper deals with the state-of-the-art synchronize-embedding-changes (SECs) steganography. We propose the pixel-decimation-assisted steganalytic feature set, a novel feature set ...
EDN

ADC Digital Downconverter: Decimation Filters and ADC Aliasing, Part 2

In part one of this blog series, ADC Digital Downconverter: Decimation Filters and ADC Aliasing, Part 1 we began looking at the decimation filtering in the DDC when the complex to real conversion is ...
EDN

ADC Digital Downconverter: Decimation Filters and ADC Aliasing, Part 1

Over the last few blogs we’ve been looking at DDCs and how frequencies are shifted and folded in the output spectrum. In the last blog, ADC Digital Downconverter: A Complex Decimation Example we ...