Electronic Design

Design-For-Test The Smart Way: dFT With A "Big T" And A "Little d"

Design-for-test, or DFT, should facilitate high-quality test, not change the design. Test techniques and strategies need to supply a high-quality test that screens out defective devices, avoiding ...
Design-Reuse

Pre-configured DFT structures can simplify ASIC design, verification

Steven Kawamoto, Sr. Marketing Manager, Custom LSI Solutions Unit, Gaku Ogura, Sr. Marketing Manager, Design Solutions Center, Richard Lee, Design Engineer, Design Solutions Center, NEC Electronics ...
Semiconductor Engineering

Shift Left In DFT Design

The semiconductor industry continues to face numerous challenges as designs approach reticle limits, process nodes evolve and engineering resources become increasingly stretched. It is essential to ...
Design-Reuse

DFT for SoC : The Economic Myths

It is often said that the emergence of the System-on-Chip will require fundamental changes in the approaches to design for testability (DFT.) These changes, it has been suggested, will take the form ...
Semiconductor Engineering

No-Compromise Packetized Test Improves DFT Efforts

Design for Test (DFT) managers often must make difficult and sometimes costly trade-offs between test implementation effort and manufacturing test cost. The traditional method for evaluating these ...