GitHub

Vector Acceleration IP core for RISC-V*.

Vector Acceleration IP core for RISC-V* is a flexible RISC-V Vector unit that aims to support RISC-V Vector extension. The interface is based on OVI (Open Vector Interface) in order to integrate with ...
IEEE

Slip prevention of a humanoid robot by coordinating acceleration vector

Abstract: A humanoid robot may suffer from slip since its two feet are not fixed on the ground. Slip occurrence may induce the loss of robot's balance. The previous literature focused on the detection ...
IEEE

Vector Characterization Method of Multiple Stress Acceleration Factors for High-Reliability Electronic Products

Abstract: Accelerated life testing is one of the rapid verification methods for highly reliable electronic products in complex service environments. Existing acceleration models primarily rely on ...
GitHub

Vectorized-Linpack-Acceleration-on-RISC-V-Vector Extension

Our aim is to leverage RISC-V Vector Extension (RVV) to vectorize the Linpack Benchmark, achieving optimal performance on RISC-V SIMD architecture. By exploiting the vector processing capabilities of ...