imecは2月17日、ISSCC 2026にて、250μm×250μmの小フットプリントを実現しつつ、1サンプルあたり2.2pJという低変換エネルギーを実現した7ビット、175GS/sの大規模タイムインターリーブ・スロープADCを発表した。

図1 これはモノリシック12ビットADCのFFTで、第3高調波がSFDRに影響する支配的な要素であることがわかります。この場合は搬送波電力が基準になり、基本周波数 (－1dBFS)から第3高調波 (－82dBFS)までのダイナミック・レンジは－81dBcです ...

Imec has introduced a 7-bit, 175GS/s massively time-interleaved slope-ADC, implemented in 5 nm FinFET technology. The device combines a record-small core area ...

At IEEE ISSCC 2026, imec introduces a 7-bit, 175GS/s wireline ADC implemented in 5nm FinFET technology, combining a record-small footprint (250 x 250µm²) and low conversion energy (2.2 pJ per sample).

Requirements for different types of sample rates. Conversion techniques for these different sample rates. Synchronous and asynchronous sample-rate conversion. This article starts with an overview of ...

The new 14-bit wideband time-interleaved pipeline analog-to-digital converter (ADC) IP cores—featuring a sampling speed of 4.32 Gsps in the 28-nm FDSOI process—are available for immediate licensing ...

The need for analog signal conditioning, including analog-to-digital converters (ADCs), continues to grow as sensors become more and more abundant within a variety of end markets. The overall sensor ...

Imec has unveiled a 7‑bit analogue‑to‑digital converter (ADC) capable of sampling at 175GS/s, combining one of the industry’s fastest reported speeds with a record‑small 250 x 250μm² core. The ...

Precision signal chain designers are challenged to meet noise performance demands in medium bandwidth applications and often end up making a trade-off between noise performance and accuracy. Achieving ...

フランス、グルノーブル、Media OutReach2020年11月16日－Teledyne e2v（https://www.teledyne-e2v.com/）は、革新的で高度に差別化された ...

The Analog-to-Digital Converter (ADC) is a key component in digital communications receive channels, and the correct choice of ADC is critical for optimizing system design. In this article, we discuss ...