GitHub

Vineet22dharwadkar/four-bit-adder-subtractor

This project implements a 4-bit Parallel Adder/Subtractor in Verilog using a Ripple Carry Adder (RCA) and logic gates like XOR, AND, and NOT. The design can perform both addition and subtraction based ...
GitHub

Ashrafansaridesigns/4-bit-adder-subtractor

This Verilog module implements a 4-bit Adder-Subtractor circuit, allowing both addition and subtraction operations based on a control signal. The design uses simple combinational logic to compute the ...
IEEE

Hybrid single electron transistor based low power consuming 4-bit parallel adder/subtractor circuit in 65 nanometer technology

Abstract: Hybridization between CMOS logic and single electron transistor has already revolutionized our present nano technological aspects. Ultra low power consumption as well as ultra dense circuit ...
Europe PMC

Design of a low-delay 4-bit parallel prefix adder using QCA technology.

This paper presents a novel low-delay 4-bit Parallel Prefix Adder (PPA) implemented as a multilayer circuit using Quantum Dot Cellular Automata (QCA) technology. PPAs are among the most suitable ...