EDN

Demonstrate a Binary Counter for High-Speed Counting

This document is a leaflet of NXP 74LVC169 demonstration board. This demonstration provides an easy evaluation of the 74LVC169, a binary counter with internal look-ahead carry circuitry designed for ...
IEEE

Streamlined Synchronous Binary Counter with Minimized Clock Period

Abstract: The necessity for high frequency and growing counter applicability are the key requirements for VLSI applications.A synchronous binary counter is one of the fundamental elements that is ...
GitHub

This repository contains a complete Proteus simulation project for a 4-bit synchronous counter

Basic BCD Counter using 7447 IC Digital Counter using Arduino Uno 4-bit Synchronous Up/Down Binary Counter using 74192 IC BCD Counter with 7447 IC Uses a 7490 Decade Counter connected to a 7447 BCD to ...
IEEE

Optimized Parallel Architecture for a Constant-Time Synchronous Binary Counter with Minimal ...

Abstract: An ideal parallel design for a clock-period-minimal constant-time synchronous binary counter is presented in this paper. The architecture makes use of two types of 8-bit synchronous binary ...